NEC V850E/PH2 User Manual page 727

<1> When the CSICAEn bit of the CSIM3n register is set to 1, operating clock supply is enabled.
<2> Specify the transfer mode by setting the CSIC3n and CSIL3n registers.
<3> Write 1 to the FPCLRn bit of the SFA3n register to clear all the CSIBUFn pointers to 0.
<4> Confirm that the SFFULn bit = 0, SFEMPn bit = 1, and SFPn3 to SFPn0 bits = 0000 in the SFA3n
register.
<5> Specify the transfer mode by using the TRMDn, DIRn, CSITn, CSWEn, and CSMDn bits of the
CSIM3n register and, at the same time, enable transmission by setting the CTXEn bit to 1.
<6> Set the number of data to be transmitted by using the SFNn3 to SFNn0 bits of the SFN3n
register.
<7> Write first CS data to the SFCS3n register and subsequently write transfer data to the SFDB3n
register. Writing data exceeding the set value of the SFN3n register is prohibited.
<8> Confirm that the INTC3n interrupt has occurred and the SFEMPn bit is 1. Then write 1 to the
FPCLRn bit of the SFA3n register, and clear all the CSIBUFn pointers to 0 in preparation for the
next transfer.
<9> Confirm that the SFFULn bit = 0, SFEMPn bit = 1, and SFPn3 to SFPn0 bits = 0000 in the SFA3n
register.
<10> Disable transmission by clearing the CTXEn bit of the CSIM3n register to 0 (end of transmission).
Remarks: 1. To execute a further transfer, repeat <6> to <9> before <10>.
2. μPD70F3187:
μPD70F3447:
Chapter 17 Clocked Serial Interface 3 (CSI3)
n = 0, 1
n = 0
User's Manual U16580EE3V1UD00 727