Chapter 8 Clock Generator; Features; Configuration; Figure 8-1: Clock Generator - NEC V850E/PH2 User Manual

The clock generator (CG) generates and controls the internal system clock (f
internal unit, such as the CPU.

8.1 Features

• Multiplier function using a phase locked loop (PLL) synthesizer (f
- Crystal frequency:
- Internal system clock:
• Power saving mode:

8.2 Configuration

X1
f
X
X2
Remark: f : External resonator or external clock frequency
X
f : Internal system clock
XX
An external resonator or crystal is connected to X1 and X2 pins, whose frequency is multiplied by the
PLL synthesizer. By this an internal system clock (f
the external resonator or crystal.
The clock controller enables PLL automatically and starts clock supply to the system after oscillation
stabilization time has passed.
Internal System Clock Frequency

Chapter 8 Clock Generator

f = 16 MHz
X
f
XX
HALT mode

Figure 8-1: Clock Generator

Clock Generator
(CG)
(f )
XX
64.000 MHz
User's Manual U16580EE3V1UD00
= 64 MHz
f
XX
) is generated that is 4 times the frequency (f
XX
External Resonator or Crystal Frequency
(f
16.0000 MHz
) that is supplied to each
XX
×
= 4 f )
XX X
CPU
On-chip peripheral I/O
)
X
) of
X
255