Figure 11-11: Tmtn I/O Control Register 2 (Ttnioc2) - NEC V850E/PH2 User Manual

(6) TMTn I/O control register 2 (TTnIOC2)
The TTnIOC2 register is an 8-bit register that controls the valid edge of external event count input
(TEVTTn pin) and external trigger input (TTRGTn pin).
This register can be read and written in 8-bit or 1-bit units.
Reset input clears this register to 00H.
Set the TTnIOC2 register when TTnCE = 0. When TTnCE = 1, write access to the TTnIOC2
register can be performed using the same value.
After reset: 00H
7
TTnIOC2 0
(n = 0, 1)
TT1EES1 TT1EES0
0
0
1
1
Remark: The settings of bits TTnEES1 and TTnEES0 are valid in the external event
TT1ETS1 TT1ETS0
0
0
1
1
Remark: The settings of bits TTnETS1 and TTnETS0 are valid in the external trigger
Remark: n = 0, 1
Chapter 11 16-bit Timer/Event Counter T

Figure 11-11: TMTn I/O Control Register 2 (TTnIOC2)

R/W
6 5
0 0
External Event Counter Input (TEVTTn) Valid Edge Setting
0 No edge detection (capture operation invalid)
1 Rising edge detection
0 Falling edge detection
1 Both, rising and falling edge detection
count mode, or when bit TTnEEE of the TTnCTL1 register = 1.
External Trigger Input (TTRGTn) Valid Edge Setting
0 No edge detection (capture operation invalid)
1 Rising edge detection
0 Falling edge detection
1 Both, rising and falling edge detection
pulse output mode and the one-shot pulse mode.
User's Manual U16580EE3V1UD00
Address: TT0IOC2 FFFFF695H,
TT1IOC2 FFFFF6A5H
4 3
0 TTnEES1 TTnEES0 TTnETS1 TTnETS0
2 1 0
473