Figure 11-37: Counter Hold Through Bit Ttnecc Timings (1/5) - NEC V850E/PH2 User Manual

(6) Counter hold through bit TTnECC
(a) Initial counter operation through bit TTnECC setting

Figure 11-37: Counter Hold through Bit TTnECC Timings (1/5)

Base clock
TTnECC
TTnCE
Internal
count
signal
Counter
TTnTCW
The setting value of the TTnTCW register is loaded to the counter and count operation is
performed from the setting value of the TTnTCW register.
(Initial value 0000H of TTnTCW register)
Base clock
TTnECC
TTnCE
Internal
count signal
Counter
TTnTCW
Since the setting value of the TTnTCW register is not loaded to the counter, the count operation is
performed from initial value FFFFH.
As the initial operation, it is recommended to set TTnECC = 0 and load to the counter the value set
to the TTnTCW register, then start the count operation.
Remark: n = 0, 1
Chapter 11 16-bit Timer/Event Counter T
(a) Count operation when TTnECC = 0 is set
Low
FFFFH m
(b) Count operation when TTnECC = 1 is set
High
FFFFH
User's Manual U16580EE3V1UD00
m+1
m
0000H
m
527