Free-Running Mode (Tpnmd2 To Tpnmd0 = 101B) - NEC V850E/PH2 User Manual

32-bit single-chip microcontroller
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9.5.7 Free-running mode (TPnMD2 to TPnMD0 = 101B)

In the free-running mode, both the interval function and the compare function can be realized by
operating the 16-bit counter as a free-running counter and selecting capture/compare operation with
the TPnCCS1 and TPnCCS0 bits.
The settings of the TPnCCS1 and TPnCCS0 bits of the TPnOPT0 register are valid only in the
free-running mode.
(a) Using TPnCCR1 register as compare register
An interrupt is output upon a match between the 16-bit counter and the CCR1 buffer register in the
free-running mode (interval function).
Rewrite during compare timer operation is enabled and performed with anytime write. (Once the
compare value has been written, synchronization with the internal clock is done and this value is
used as the 16-bit counter comparison value.)
When timer output (TOPn1) has been enabled, TOPn1 performs toggle output upon a match
between the 16-bit counter and the CCR1 buffer register.
Chapter 9 16-Bit Timer/Event Counter P
TPnCCS1
0
Use TPnCCR1 register as compare register
1
Use TPnCCR1 register as capture register
TPnCCS0
0
Use TPnCCR0 register as compare register
1
Use TPnCCR0 register as capture register
User's Manual U16580EE3V1UD00
Operation
Operation
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