Output Pins - NEC V850E/PH2 User Manual

16.5 Output Pins

(1) SCKBn pin
When CSIBn operation is disabled (CBnPWR bit of CBnCTL0 register = 0), the SCKBn pin output
status is as follows.
CBnCKP
0
1
Remarks: 1. The SCKBn pin output changes when the CBnCKP bit of the CBnCTL1 register is
rewritten.
2. μPD70F3187:
μPD70F3447:
(2) SOBn pin
When CSIBn operation is disabled (CBnPWR bit = 0), the SOBn pin output status is as follows.
CBnTXE
0
1
Remarks: 1. The SOBn pin output changes when any one of the CBnTXE, CBnDAP, and CBnDIR
bits of the CBnCTL1 register is rewritten.
2. μPD70F3187:
μPD70F3447:
3. ×: don't care
666
Chapter 16 Clocked Serial Interface B (CSIB)
Fixed to high level
Fixed to low level
n = 0, 1
n = 0
CBnDAP CBnDIR
×
0
1
n = 0, 1
n = 0
User's Manual U16580EE3V1UD00
SCKBn Pin Output
SOBn Pin Output
× Fixed to high level
× SOBn latch value (low level)
0 CBnTXn value (MSB)
1 CBnTXn value (LSB)