Figure 14-13: Example Of 4-Buffer Mode Operation (A/D Trigger Select: 4 Buffers) - NEC V850E/PH2 User Manual

Figure 14-13: Example of 4-Buffer Mode Operation (A/D Trigger Select: 4 Buffers)

ADMn2
<1> The ADCEn bit of ADMn0 register is set to 1 (enable)
<2> ANIn3 is A/D converted
<3> The conversion result is stored in ADCRn0 register
<4> ANIn3 is A/D converted
<5> The conversion result is stored in ADCRn1 register
<6> ANIn3 is A/D converted
<7> The conversion result is stored in ADCRn2 register
<8> ANIn3 is A/D converted
<9> The conversion result is stored in ADCRn3 register
<10> The INTAD interrupt is generated
Remark: n = 0, 1
m = 0 to 9
Chapter 14 A/D Converter
ANIn0
ANIn1
ANIn2
ANIn3
×
ANIn4
( 4)
ANIn5
ANIn6
ANIn7
ANIn8
ANIn9
User's Manual U16580EE3V1UD00
A/D converter
(ADCn)
ADCRn0
ADCRn1
ADCRn2
ADCRn3
ADCRn4
ADCRn5
ADCRn6
ADCRn7
ADCRn8
ADCRn9
593