Figure 9-26: Flowchart of Basic Operation in PWM Mode (1/2)
(a) Values of TPnCCR0, TPnCCR1 registers not rewritten during timer operation
Remark:
n = 0 to 8
m = 0, 1
Chapter 9 16-Bit Timer/Event Counter P
START
Initial settings
• Clock selection
(TPnCTL0: TPnCKS2 to TPnCKS0)
• PWM mode settings
(TPnCTL1: TPnMD2 to TPnMD0 =
100B)
• Compare register setting
(TPnCCR0, TPnCCR1)
Timer operation enable (TPnCE = 1)
→ Transfer of TPnCCRm register
values to CCRm buffer register
Match between 16-bit counter and CCR1
buffer register, TOPn1 low-level output
Match between 16-bit counter and CCR0
buffer register, 16-bit counter clear &
start
TOPn1 high-level output
User's Manual U16580EE3V1UD00
INTTPnCC1 output
INTTPnCC0 output
293