Figure 18-17: Recovery From Bus-Off State Through Normal Recovery Sequence - NEC V850E/PH2 User Manual

32-bit single-chip microcontroller
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Figure 18-17: Recovery from bus-off state through normal recovery sequence

TEC > FFH
»error-passive«
BOFF bit
in CnINFO
register
OPMODE[2:0]
in CnCTRL
00H
register
(user writings)
OPMODE[2:0]
in CnCTRL
00H
register
(user readings)
TEC[7:0]
80H ≤ TEC[7:0] ≤ FFH
in CnERC
register
REPS, REC[6:0]
00H ≤ REPS, REC[6:0] ≤ 80H
in CnERC
register
(b) Forced recovery operation that skips bus-off recovery sequence
The CAN module can be forcibly released from the bus-off state, regardless of the bus state, by
skipping the bus-off recovery sequence. Here is the procedure.
First, the CAN module requests to enter the initialization mode. For the operation and points to be
noted at this time, "Recovery from bus-off state through normal recovery sequence" on page 757.
Next, the module requests to enter an operation mode. At the same time, the CCERC bit of the
CnCTRL register must be set to 1.
As a result, the bus-off recovery sequence defined by the CAN protocol ISO 11898 is skipped, and
the module immediately enters the operation mode. In this case, the module is connected to the
CAN bus after it has monitored 11 consecutive recessive-level bits. For details, refer to the
processing in <~Reference>Figure 18-54 on page 859.
Caution:
This function is not defined by the CAN protocol ISO 11898. When using this func-
tion, thoroughly evaluate its effect on the network system.
(6)
Initializing CAN module error counter register (CnERC) in initialization mode
If it is necessary to initialize the CAN module error counter register (CnERC) and CAN module
information register (CnINFO) for debugging or evaluating a program, they can be initialized to the
default value by setting the CCERC bit of the CnCTRL register in the initialization mode. When ini-
tialization has been completed, the CCERC bit is automatically cleared to 0.
Cautions: 1. This function is enabled only in the initialization mode. Even if the CCERC bit is
set to 1 in a CAN operation mode, the CnERC and CnINFO registers are not initial-
ized.
2. The CCERC bit can be set at the same time as the request to enter a CAN opera-
tion mode.
758
Chapter 18 AFCAN Controller
»bus-off«
<1>
00H
FFH < TEC [7:0]
User's Manual U16580EE3V1UD00
»bus-off-recovery-sequence«
<2>
00H
00H
00H
Undefined
»error-active«
<3>
00H
00H ≤ TEC[7:0] < 80H
00H ≤ REPS, REC[6:0] < 80H

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