Figure 6-3: Dma Transfer Count Registers 0 To 7 (Dtcr0 To Dtcr7) - NEC V850E/PH2 User Manual

(3) DMA transfer count registers 0 to 7 (DTCR0 to DTCR7)
The DTCRn register is an 8-bit register that set the transfer count for DMA channel n and stores
the remaining transfer count during DMA transfer (n = 0 to 7).
This register can be read or written in 8-bit units.
After reset the register content is undefined.

Figure 6-3: DMA Transfer Count Registers 0 to 7 (DTCR0 to DTCR7)

After reset: undefined
7
DTCRn DTCRn7
DTCRn
7
0
0
0
0
1
1
Cautions: 1. The value set to the DTCRn register is decreased by each DMA transfer of
channel n. It does not keep the initial value after the DMA transfer ends.
Therefore, after DMA transfer end the DTCRn register values becomes 00H.
2. A DMA request becomes only effective after the DTCRn register was written.
Even if 00H (means a transfer count of 256) is the initial value, the DTRCn register
must be rewritten in order to enable a new DMA transfer.
Remark: n = 0 to 7
196
Chapter 6 DMA Functions (DMA Controller)
R/W
6 5
DTCRn6 DTCRn5
DTCRn DTCRn DTCRn
6 5 4
0 0 0
0 0 0
0 0 0
0 0 0
1 1 1
1 1 1
User's Manual U16580EE3V1UD00
Address: DTCR0 FFFFF320H, DTCR1 FFFFF322H
DTCR2 FFFFF324H, DTCR3 FFFFF326H
DTCR4 FFFFF328H, DTCR5 FFFFF32AH
DTCR6 FFFFF32CH, DTCR7 FFFFF32EH
4 3
DTCRn4 DTCRn3
DTCRn DTCRn DTCRn
3 2 1
0 0 0
0 0 0
0 0 1
0 0 1
·
·
·
1 1 1
1 1 1
2 1
DTCRn2 DTCRn1 DTCRn0
DTCRn Remaining DMA
0 Transfer Counts
0 256
1 1
0 2
1 3
·
·
·
0 254
1 255
0