(b) TRnCCR1 to TRnCCR3 register rewrite operation in high-accuracy T-PWM mode
Counter
Reloadable timing
TRnCCR1
TRnCCR1
buffer
TORn1
TORn2
INTTRnCC1
Remark:
When TRnDTC0 = 0, TRnDTC1 = 0
Rewrite in <1> interval (rewrite during up count)
Since reload is performed at the peak interrupt timing, an asymmetric triangular waveform is
output.
Rewrite in <2> interval (rewrite during down count)
Since reload is performed at the valley interrupt timing, an asymmetric triangular waveform is
output.
Chapter 10 16-bit Inverter Timer/Counter R
"i"
"i"
"k"
"i"
<1>
User's Manual U16580EE3V1UD00
"k"
"r"
"r"
"k"
<2>
<1>
"r"
"r"
<2>
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