Overload Frame; Figure 18-16: Overload Frame; Table 18-8: Definition Of Overload Frame Fields - NEC V850E/PH2 User Manual

32-bit single-chip microcontroller
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18.2.5 Overload frame

An overload frame is transmitted under the following conditions.
When the receiving node has not completed the reception operation
If a dominant level is detected at the first two bits during intermission
If a dominant level is detected at the last bit (7th bit) of the end of frame or at the last bit (8th bit) of
the error delimiter/overload delimiter
Note: The CAN is internally fast enough to process all received frames not generating overload
frames.
R
D
(<4>)
Note: D: Dominant = 0
R: Recessive = 1
No
Name
<1>
Overload flag
Overload flag from other node
<2>
Overload delimiter
<3>
Frame
<4>
Interframe space/overload
<5>
frame
Chapter 18 AFCAN Controller

Figure 18-16: Overload frame

Overload frame
<1>
<2>
6 bits
0 to 6 bits

Table 18-8: Definition of overload frame fields

Bit count
6
0 to 6
8
User's Manual U16580EE3V1UD00
<3>
(<5>)
8 bits
Interframe space or overload frame
Overload delimiter
Overload flag
Overload flag
Frame
Outputs 6 dominant-level bits consecutively.
The node that received an overload flag in the interframe
space outputs an overload flag.
Outputs 8 recessive-level bits consecutively.
If a dominant level is detected at the 8th bit, an overload
frame is transmitted from the next bit.
Output following an end of frame, error delimiter, or overload
delimiter.
An interframe space or overload frame starts from here.
Definition
751

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