Figure 9-3: Tmpn Capture/Compare Register 1 (Tpnccr1) - NEC V850E/PH2 User Manual

(2) TMPn capture/compare register 1 (TPnCCR1)
The TPnCCR1 register is a 16-bit register that functions both as a capture register and as a
compare register.
Whether this register functions as a capture register or as a compare register can be controlled
with the TPnCCS1 bit of the TPnOPT0 register, but only in the free-running mode.
In the pulse width measurement mode, this register can be used as a dedicated capture register
(the compare function cannot be used.)
In modes other than the free-running mode and pulse width measurement mode, this register is
used as a dedicated compare register.
In the initial setting, the TPnCCR1 register is a reload register.
This register can be read or written in 16-bit units.
Reset input clears this register to 0000H.

Figure 9-3: TMPn Capture/Compare Register 1 (TPnCCR1)

After reset:
15 14
TPnCCR1
(n = 0 to 8)
(a) Use as compare register
TPnCCR1 can be rewritten when TPnCE = 1
The timing at which the TPnCCR1 rewrite values become valid when TPnCE = 1 is as follows.
TMP Operation Mode
PWM mode, external trigger pulse output mode
Free-running mode, external event count mode,
one-shot pulse output mode, interval timer
mode
Pulse width measurement mode
(b) Use as capture register
• TMP0 to TMP7
The counter value is saved to TPnCCR1 upon capture trigger (TIPn1) input edge detection.
• TMP8
Since TMP8 has no external input pin, the capture function can only be used internally for
capturing the interrupt signal (INTTT0CC1 of TMT0, or INTCM11 of TMENC1) specified by the
TPIC22 bit of TPIC2 register (ref. to 9.4 (9) TMP input control register 2 (TPIC2)).
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Chapter 9 16-Bit Timer/Event Counter P
0000H R/W
13 12 11 10
User's Manual U16580EE3V1UD00
Address: TP0CCR1 FFFFF608H, TP1CCR1 FFFFF618H,
TP2CCR1 FFFFF628H, TP3CCR1 FFFFF638H,
TP4CCR1 FFFFF648H, TP5CCR1 FFFFF658H,
TP6CCR1 FFFFF668H, TP7CCR1 FFFFF678H,
TP8CCR1 FFFFF688H
9 8 7 6
Method of Writing TPnCCR0 Register
Reload
Anytime write
Cannot be used because dedicated capture
register
5 4 3 2 1 0