Basic Operation; Basic Counter Operation - NEC V850E/PH2 User Manual

10.4 Basic Operation

10.4.1 Basic counter operation

This section describes the basic operation of the 16-bit counter. For details, refer to the description of
the operation of each mode.
(1) Count start operation
The 16-bit counter of timer R starts counting from initial value FFFFH in all the modes except the
high-accuracy T-PWM mode.
The counter counts up FFFFH, 0000H, 0001H, 0002H, 0003H, ...
For the count operation in the high-accuracy T-PWM mode refer to section 10.10.9 10.10.9.
(2) Clear operation
The 16-bit counter is cleared to 0000H upon a match between the 16-bit counter and the compare
register. Counting immediately following the start of count operation and counting from FFFFH to
0000H in the case of overflow are not detected as clear operations.
(3) Overflow operation
16-bit counter overflow occurs when the value of the 16-bit counter changes from FFFFH to
0000H. When overflow occurs, bit TRnOVF of the TRnOPT0 register is set (to 1), and an interrupt
(INTTRnOV) is output. No overflow interrupt (INTTRnOV) is output under the following conditions.
• Immediately after count operation start
• When compare value is matched and cleared at FFFFH
Caution: Be sure to check that the overflow flag (TRnOVF) is set to 1 following output of the
overflow interrupt (INTTRnOV).
(4) Counter read operation during count operation
In the case of timer R, the value of the 16-bit counter can be read by the TRnCNT register during
count operation.
Chapter 10 16-bit Inverter Timer/Counter R
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