NEC V850E/PH2 User Manual page 296

Figure 9-27: Basic Operation Timing in PWM Mode (2/2)
TPnCE = 1
FFFFH
16-bit counter
TPnCCR0
CCR0 buffer
0000H
register
TPnCCR1
CCR1 buffer
0000H
register
TOPn1
Note 2
TOPn0
Notes: 1. Reload is not performed because the TPnCCR1 register was not rewritten.
2. TOPn0 output pin is not available for TMP8 (n = 8).
Remarks: 1. D , D
00
D , D
10
2. TOPn1 output duty factor
TOPn1 output cycle
TOPn0 output toggle width = (Setting value of TPnCCR0 register + 1)
3. n = 0 to 8
296
Chapter 9 16-Bit Timer/Event Counter P
(b) TPnCCR0, TPnCCR1 values rewritten
D
00
D
10
D D
00 01
D
00
D
10
D
10
, D , D : Setting values of TPnCCR0 register (0000H to FFFFH)
01 02 03
, D , D : Setting values of TPnCCR1 register (0000H to FFFFH)
11 12 13
User's Manual U16580EE3V1UD00
D
01
D
11
D
Note
D
01
D
11
Note
D
11
= (Setting value of TPnCCR1 register)
/ (Setting value of TP0CCR0 register + 1)
= (Setting value of TPnCCR0 register + 1)
× (Count clock cycle)
× (Count clock cycle)
D
01
D
11
D
12
02
D
02
D
12
D
12
D
02
D
03
D
03
Same value write
D
12
D
12