Figure 7-9: Example Of Processing Interrupt Requests Simultaneously Generated - NEC V850E/PH2 User Manual

32-bit single-chip microcontroller
Table of Contents

Advertisement

Figure 7-9: Example of Processing Interrupt Requests Simultaneously Generated

Main routine
Interrupt request a (level 2)
Interrupt request b (level 1)
Interrupt request c (level 1)
Default priority
a > b > c
Caution:
The values of the EIPC and EIPSW registers must be saved before executing multiple
interrupts. When returning from multiple interrupt servicing, restore the values of
EIPC and EIPSW after executing the DI instruction.
Chapter 7 Interrupt/Exception Processing Function
EI
Processing of interrupt request b
Processing of interrupt request c
Processing of interrupt request a
User's Manual U16580EE3V1UD00
.
Interrupt request b and c are
acknowledged first according to
.
their priorities.
Because the priorities of b and c are
the same, b is acknowledged first
according to the default priority.
235

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

Mupd70f3187

Table of Contents