Figure 14-1: Block Diagram Of A/D Converter (Adcn) - NEC V850E/PH2 User Manual

(9) AV pin (n = 0, 1)
SSn
This is the ground pin of the A/D converter. Always use this pin at the same potential as that of the
EV pin even when the A/D converter is not used.
SS
(10) AV pin
DD
This is the analog power supply pin of both A/D converters (ADC0, ADC1).
f /4
XX
ADTRGn
detection
TR0ADTRG0
Trigger
TR0ADTRG1
events
from
INTTR0OD
TMR0
INTTR0CD
TR1ADTRG0
Trigger
TR1ADTRG1
events
from
INTTR1OD
TMR1
INTTR1CD
Remarks: 1. f : Main clock
XX
2. n = 0, 1
Cautions: 1. If there is noise at the analog input pins (ANIn0 to ANIn9) or at the reference
voltage input pin (AV
Software processing will be needed to avoid a negative effect on the system from
this illegal conversion result.
An example of this software processing is shown below.
• Take the average result of a number of A/D conversions and use that as the
A/D conversion result.
• Execute a number of A/D conversions consecutively and use those results,
omitting any exceptional results that may have been obtained.
2. Do not apply a voltage outside the AV
used as A/D converter input pins.
Chapter 14 A/D Converter

Figure 14-1: Block Diagram of A/D Converter (ADCn)

ANIn0
ANIn1
ANIn2
ANIn3
ANIn4
ANIn5
ANIn6
ANIn7
ANIn8
ANIn9
Edge
Trigger
selector
), that noise may generate an illegal conversion result.
REFn
User's Manual U16580EE3V1UD00
C-Dummy
C-Array
Controller
to AV
SSn
Comparator
Successive approximation
register (SAR)
ADCRn0 (ADCRn0H)
ADDMAn
ADCRn1 (ADCRn1H)
ADCRn2 (ADCRn2H)
ADCRn3 (ADCRn3H)
ADCRn4 (ADCRn4H)
ADCRn5 (ADCRn5H)
ADCRn6 (ADCRn6H)
ADCRn7 (ADCRn7H)
ADCRn8 (ADCRn8H)
ADCRn9 (ADCRn9H)
range to the pins that are
REFn
AV
REFn
AV
DD
AV
SSn
INTADn
ADDMARQn
575