Figure 10-48: Basic Operation Mode in PWM Mode (1/2)
(a) When values of TRnCCR0 to TRnCCR5 registers are rewritten during timer operation
Remark:
n = 0, 1
m = 0 to 5
404
Chapter 10 16-bit Inverter Timer/Counter R
START
Initial settings
•
Clock selection
(TRnCTL0: TRnCKS2 to TRnCKS0)
•
PWM mode setting
(TRnCTL1: TRnMD3 to TRnMD0 = 0100)
•
Compare register setting
(TRnCCR0 to TRnCCR5)
Timer operation enable
→
Transfer of value of
TRnCCRm to TRnCCRm buffer
TORn1 to TORn5 output low level
upon a match between counter and
TRnCCR1 to TRnCCR5 bffers.
Upon a match between counter
and TRnCCR0 buffer, counter clear
& start, and TORn1 to TORn5
output high level.
User's Manual U16580EE3V1UD00
INTTRnCC1 to INTTRnCC5
occurrence
INTTRnCC0 occurrence