Cpu Functions; Features - NEC V850E/PH2 User Manual

The CPU of the V850E/PH2 microcontroller is based on the RISC architecture and executes most
instructions in one clock cycle by using a 5-stage pipeline control.

3.1 Features

• Number of instructions:
• Minimum instruction execution time:
• Memory space
• General-purpose registers:
• Internal 32-bit architecture
• 5-stage pipeline control
Multiply/divide instructions (32 bits × 32 bits → 64 bits in 1 to 2 clocks)
•
• Saturated operation instructions
• Floating point arithmetic unit (single precision, 32 bits, IEEE754-85 standard)
• 32-bit shift instruction:
• Load/store instruction with long/short format
• Four types of bit manipulation instructions
- SET1
- CLR1
- NOT1
- TST1
Chapter 3 CPU Functions
96
15.6 ns (@ 64 MHz operation)
Program space:
Data space:
32 bits × 32
1 clock
User's Manual U16580EE3V1UD00
64 MB linear
4 GB linear
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