Figure 14-8: A/D Conversion Result Registers N0 To N9, N0H To N9H (Adcrn0 To Adcrn9, Adcrn0H To Adcrn9H) - NEC V850E/PH2 User Manual

(6) A/D conversion result register n for DMA (ADDMAn)
The ADDMAn register is a 16-bit register holding the result of the latest A/D conversion operation,
and is used for DMA transfer of ADCn results into the internal RAM. It has an overrun detection
flag indicating an overrun situation of the DMA transfer mechanism (n = 0, 1).
This register is read-only in 16-bit units.
Reset input causes an undefined register content.
Caution: Do not read the ADDMAn register by CPU during DMA transfer activities. If this
register is read by CPU, overflow detection cannot be ensured.
Figure 14-8: A/D Conversion Result Registers n0 to n9, n0H to n9H
After reset: Undefined
15 14
ADDMAn ADDMA ADDMA
n9 n8
ADDMAn9 to
ADDMAn0
000H to 3FFH
ODFn
0
1
• The ODFn flag is used for indicating a DMA transfer failure of the A/D conversion
results.
• The ODFn flag is cleared (0), when the A/D conversion is stopped (ADCEn bit of the
ADMn0 register is cleared to 0).
Remark: n = 0, 1
584
Chapter 14 A/D Converter
(ADCRn0 to ADCRn9, ADCRn0H to ADCRn9H)
R Address:
13 12 11 10
ADDMA ADDMA ADDMA ADDMA ADDMA
n7 n6 n5 n4
Latest A/D conversion result value
No A/D conversion result overrun was detected.
At least one A/D conversion result was overrun since the last read of the
ADDMAn register.
User's Manual U16580EE3V1UD00
ADDMA0 FFFFF224H,
ADDMA1 FFFFF264H
9 8 7 6 5
ADDMA ADDMA ADDMA
0
n3 n2 n1 n0
A/D Conversion Result for DMA Transfer
Overrun Detection Flag
4 3 2 1 0
0 0 0 0 ODFn