Control Registers; Figure 22-1: Internal Ram Parity Error Status Register (Ramerr) - NEC V850E/PH2 User Manual

22.3 Control Registers

(1) Internal RAM parity error status register (RAMERR)
The RAMERR register is an 8-bit register that reflects the parity error flags of the four bytes of one
word (32 bits) in the internal RAM. The corresponding error flag (bits RAE0 to RAE3) is set and a
maskable interrupt (INTPERR) is generated, if a parity error is detected during read access.
This register can be read or written in 8-bit or 1-bit units.
Reset input clears this register to 00H.

Figure 22-1: Internal RAM Parity Error Status Register (RAMERR)

After reset: 00H
7
RAMERR 0
RAEn
0
1
Remark: The RAEn bit can be both read and written, but it can only be cleared by writing
974
Chapter 22 Internal RAM Parity Check Function
R/W Address:
6 5
0 0
No parity error detected in internal RAM.
Parity error detected in internal RAM for byte position n.
n Bit Name
0 RAE0
1 RAE1
2 RAE2
3 RAE3
0 to it, and it cannot be set by writing 1 to it.
User's Manual U16580EE3V1UD00
FFFFF4C0H
4 3
0 RAE3 RAE2
Internal RAM Parity Error Flag
Function
Parity error caused by bits 0 to 7
Parity error caused by bits 8 to 15
Parity error caused by bits 16 to 23
Parity error caused by bits 24 to 31
2 1 0
RAE1 RAE0