NEC V850E/PH2 User Manual page 613

32-bit single-chip microcontroller
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Figure 15-2: UARTCn Control Register 0 (UCnCTL0) (2/2)
UCnDIR
0
1
This bit can be rewritten only when UCnPWR bit = 0 or UCnTXE bit = UCnRXE bit = 0.
UCnPS1
0
0
1
1
• These bits can be rewritten only when UCnPWR bit = 0 or UCnTXE bit = UCnRXE bit
= 0.
• If "Reception with 0 parity" is selected during reception, a parity check is not performed.
Therefore, since the UCnPE bit of the UCnSTA0 register is not set, no error interrupt is
output.
• When transmission and reception are performed in the LIN format, set the UCnPS1 and
UCnPS0 bits to 00B.
UCnCL
0
1
This bit can be rewritten only when UCnPWR bit = 0 or UCnTXE bit = UCnRXE bit = 0.
UCnSL
0
1
This bit can be rewritten only when UCnPWR bit = 0 or UCnTXE bit = UCnRXE bit = 0.
Remark:
For details of parity, see 15.5.9 "Parity types and operations" on page 637.
Chapter 15 Asynchronous Serial Interface C (UARTC)
MSB-first transfer
LSB-first transfer
UCnPS0
During Transmission
0
No parity output
1
0 parity output
0
Odd parity output
1
Even parity output
7 bits
8 bits
1 bit
2 bits
User's Manual U16580EE3V1UD00
Transfer Direction Selection
Parity Selection
Reception with no parity
Reception with 0 parity
Odd parity check
Even parity check
Data Character Length Specification
Stop Bit Length Specification
During Reception
613

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