Setting Of Frc Overflow Flag (Ovf) - Hitachi H8/329 Series Hardware Manual

(2) Timing of Input Capture Flag (ICF) Setting: The input capture flag ICFx (x = A, B, C, D) is
set to "1" by the internal input capture signal. Figure 6-15 shows the timing of this operation.
Ø
Internal input
capture signal
ICFA/B/C/D
FRC
ICRA/B/C/D

6.4.4 Setting of FRC Overflow Flag (OVF)

The FRC overflow flag (OVF) is set to "1" when the FRC overflows (changes from H'FFFF to
H'0000). Figure 6-16 shows the timing of this operation.
Ø
FRC
Internal overflow
signal
OVF
Figure 6-15. Setting of Input Capture Flag
H'FFFF
Figure 6-16. Setting of Overflow Flag (OVF)
136
N
N
H'0000