Keithley 4200-SCS Reference Manual page 251

Semiconductor characterization system
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Model 4200-SCS Reference Manual
Figure 6-147
Figure
Figure 6-147
Stepping and sweeping example
Understanding Master Steps vs. Slave Steps
You can simultaneously apply multiple step forcing functions to multiple device terminals (for
example, stepping the biases on two transistor terminals and sweeping voltage or current on the
third terminal). However, all of the sweep forcing functions in the ITM must track with regard to
step number and duration. Therefore, one of the step functions must be user-designated as the
Master. All other step functions are automatically designated as slaves.
this concept.
Figure 6-148
Master Step function versus Slave Step function
4200-901-01 Rev. S / May 2017
graphically illustrates the combined Step and Sweep forcing functions specified in
6-146.
5
4
3
Step 1
2
1
0
At Each Gate Voltage Step, Sweeping the Drain Voltage of the FET
5
4
3
2
1
0
Master Step Function
Step 1
Step 1
Slave Step Function
Return to
Section 6: Keithley Interactive Test Environment (KITE)
Stepping the Gate Voltage of a FET
Step 3
Step 2
Time
Time
Step 3
Step 2
Time
Step width and number of steps of
slave function track step width and
Step 2
number of steps of master function
Step 3
Section Topics
Step 4
Figure 6-148
illustrates
Step 4
Step 4
6-125

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