Vgid_Dc_Pulse_Pulseiv - Keithley 4200-SCS Reference Manual

Section 12: Pulse Projects for Models 4200-PIV-A and 4200-PIV-Q

VgId_DC_Pulse_pulseiv

Description
Connection
Table 12-14
Inputs for Vgid_DC_Pulse_pulseiv
Input
Vds
VgStart
VgStop
VgStep
Vg_off
PulseWidth
12-28
The VgId_DC _Pulse pulseiv sweep is used to perform a Pulsed vs DC Vg-Id
sweep using the 4200-PIV-A package. This test is similar to a typical Vg-Id but
only two sources are used: one for the DUT Gate and one for the DUT Drain.
Pulsed Measurements are made with the 2-channel scope, 4200-SCP2.
This routine can run the sweeps as DC only, Pulse only, or as Pulse and DC curves.
This routine supports from 1 to 10 Vd-Id curves based on up to 10 different Vgs
values.
This routine also supports the 4200-PIV-A package using the 4200-RBT. For this
package, all test parameters and limits are given below, except the 4200-PIV-A
with the 4200-RBT has a maximum pulse width of 150 ns, not the 250 ns of the
4205-RBT.
All voltage levels specified below assume a 50 Ω DUT load.
The source and body (well) of the DUT must be shorted together and connected to
the common low (outer shield) of the SMA cables on the AC+DC output of the
4205-RBT. The RBT connected to GateSMU (the RBT with the Power Divider)
should be connected to the gate. The RBT connected to DrainSMU should be
connected to the drain. Use either G-S-G probes for RF structures, or use DC
probes with the 4200-PRB-C adapter cables for DC structures.
Set the appropriate values for the Vds-Id parameters. Inputs, outputs and returned
values are provided in Table
Type Description
double The voltage value for Vd. For DC only sweeps, Vds must be
between -200 V to +200 V dependent on the type of SMU and the
current requirements of the DUT. For pulse and pulse and DC
Sweeps, Vds must be between -5 V to +5 V.
double The starting step value for Vg. For DC only sweeps, VgStart must be
between -200 V to +200 V dependent on the type of SMU and the
current requirements of the DUT. For pulse and pulse and DC
Sweeps, VgStart must be between -5 V to +5 V.
double The final step value for Vg. For DC only sweeps, VgStop must be
between -200 V to +200 V dependent on the type of SMU and the
current requirements of the DUT. For pulse and pulse and DC
Sweeps, VgStop must be between -5 V to +5 V.
double The sweep step size for the Vg sweep, output by channel 1 of the
4200-PG2 (VPUID).
double The DC bias applied by the GateSMU to put device in the OFF
state. Normally set to 0 V for enhancement FETs (may be non-zero
for depletion FETs). This package does not support a similar
capability for the drain. For full quiescent, or bias, point testing,
review the 4200-PIV-Q specs.
double The Vgs pulse width (PW). The PW can be 40 ns to 250 ns (10 ns
resolution). Pulses wider than 250 ns will begin to be attenuated by
the coupling capacitor in the Remote Bias Tee (4205-RBT).
Return to Section Topics
12-14, Table 12-15 and
Model 4200-SCS Reference Manual
Table 12-16.
4200-901-01 Rev. S / May 2017