Standby Mode Transition And Pin States - Hitachi HD6473867 Hardware Manual

5.3.4 Standby Mode Transition and Pin States

When a SLEEP instruction is executed in active (high-speed) mode or active (medium-speed) mode
while bit SSBY is set to 1 and bit LSON is cleared to 0 in SYSCR1, and bit TMA3 is cleared to 0 in
TMA, a transition is made to standby mode. At the same time, pins go to the high-impedance state
(except pins for which the pull-up MOS is designated as on). Figure 5-2 shows the timing in this
case.
ø
Internal data bus
Pins
Active (high-speed) mode or active (medium-speed) mode
SLEEP instruction fetch
SLEEP instruction execution
Port output
Figure 5-2 Standby Mode Transition and Pin States
Fetch of next instruction
105
Internal processing
High-impedance
Standby mode