ST STM32F405 Reference Manual page 1155

RM0090
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Filter i Byte Mask
This register defines which bytes of the frame are examined by filter i (0, 1, 2, and 3) in
order to determine whether or not the frame is a wakeup frame. The MSB (thirty-first
bit) must be zero. Bit j [30:0] is the Byte Mask. If bit j (byte number) of the Byte Mask is
set, then Filter i Offset + j of the incoming frame is processed by the CRC block;
otherwise Filter i Offset + j is ignored.
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Filter i Command
This 4-bit command controls the filter i operation. Bit 3 specifies the address type,
defining the pattern's destination address type. When the bit is set, the pattern applies
to only multicast frames. When the bit is reset, the pattern applies only to unicast
frames. Bit 2 and bit 1 are reserved. Bit 0 is the enable bit for filter i; if bit 0 is not set,
filter i is disabled.
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Filter i Offset
This register defines the offset (within the frame) from which the frames are examined
by filter i. This 8-bit pattern offset is the offset for the filter i first byte to be examined.
The minimum allowed is 12, which refers to the 13th byte of the frame (offset value 0
refers to the first byte of the frame).
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Filter i CRC-16
This register contains the CRC_16 value calculated from the pattern, as well as the
byte mask programmed to the wakeup filter register block.
Remote wakeup frame detection
When the MAC is in sleep mode and the remote wakeup bit is enabled in the
ETH_MACPMTCSR register, normal operation is resumed after receiving a remote wakeup
frame. The application writes all eight wakeup filter registers, by performing a sequential
write to the wakeup frame filter register address. The application enables remote wakeup by
writing a 1 to bit 2 in the ETH_MACPMTCSR register. PMT supports four programmable
filters that provide different receive frame patterns. If the incoming frame passes the
address filtering of Filter Command, and if Filter CRC-16 matches the incoming examined
pattern, then the wakeup frame is received. Filter_offset (minimum value 12, which refers to
the 13th byte of the frame) determines the offset from which the frame is to be examined.
Filter Byte Mask determines which bytes of the frame must be examined. The thirty-first bit
of Byte Mask must be set to zero. The wakeup frame is checked only for length error, FCS
error, dribble bit error, MII error, collision, and to ensure that it is not a runt frame. Even if the
wakeup frame is more than 512 bytes long, if the frame has a valid CRC value, it is
considered valid. Wakeup frame detection is updated in the ETH_MACPMTCSR register for
every remote wakeup frame received. If enabled, a PMT interrupt is generated to indicate
the reception of a remote wakeup frame.
Magic packet detection
The Magic Packet frame is based on a method that uses Advanced Micro Device's Magic
Packet technology to power up the sleeping device on the network. The MAC receives a
specific packet of information, called a Magic Packet, addressed to the node on the network.
Only Magic Packets that are addressed to the device or a broadcast address are checked to
determine whether they meet the wakeup requirements. Magic Packets that pass address
filtering (unicast or broadcast) are checked to determine whether they meet the remote
Wake-on-LAN data format of 6 bytes of all ones followed by a MAC address appearing 16
times. The application enables Magic Packet wakeup by writing a 1 to bit 1 in the
ETH_MACPMTCSR register. The PMT block constantly monitors each frame addressed to
Ethernet (ETH): media access control (MAC) with DMA controller
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