Figure 6.13-28 I 2 C Wake-Up Related Signals Waveform - Nuvoton ISD94124BYI Technical Reference Manual

SCL(signal)
PWD(signal)
WKIF(I2C_WKSTS[0])
WRSTSWK(I2C_WKSTS[2])
WKACDONE(I2C_WKSTS[1])
SI(I2C_CTL[3])
Figure 6.13-28 I
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6.13.5.4.10 The I C Control Register 1 (I2C_CTL1)
If the enable 10-bit mode ADDR10EN (I2C_CTL1 [9]) is set, the I
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6.13.5.4.11 The I C Status Register 1 (I2C_STATUS1)
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The I C controller supports four slave address flag registers, ADMAT0, ADMAT1, ADMAT2 and
ADMAT3 (I2C_STATUS1[3:0]). Every control register represent which address is used and set 1 to
inform software.
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6.13.5.4.12 The I C Timing Configure Control Register (I2C_TMCTL)
In order to configure setup/hold time, the HTCTL [5:0] (I2C_TMCTL[11:6]) and STCTL [5:0]
(I2C_TMCTL[5:0]) are set based on actual demand.
6.13.5.4.13 Bus Management Control Register (I2C_BUSCTL)
The SM bus management control events are defined in this register. It includes the Acknowledge
Control by Manual (ACKMEN (I2C_BUSCTL[0])), Packet Error Checking Enable (PECEN
(I2C_BUSCTL[1])), device (BMDEN(I2C_BUSCTL[2])) or host (BMHEN (I2C_BUSCTL[3])) enable
in this peripheral device. Both the alert and the suspend function can be set in ALERTEN
(I2C_BUSCTL[4]), SCTLOSTS (I2C_BUSCTL[5])) and SCTLOEN (I2C_BUSCTL[6]).
The calculated PEC (when the PECEN is set) value is transmitted or received can be controlled by
PECTXEN bit (I2C_BUSCTL[8]).
There is a special bit of ACKM9SI (I2C_BUSCTL[11]). When the ACKMEN is set, there is SI
interrupt in the 8th clock input and the user can read the data and status register. If the 8th clock
bus is released when the SI interrupt is cleared, there is another SI interrupt event in the 9th clock
cycle when this bit is set to 1 to know the bus status in this transaction frame done.
Set the PECDIEN (I2C_BUSCTL[13]), BCDIEN (I2C_BUSCTL[12]) or PECCLR (I2C_BUSCTL[10])
for PEC control flow.
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6.13.5.4.14 I C Bus Management Timer Control Register (I2C_BUSTCTL)
Set TORSTEN
(I2C_BUSTCTL[2]), CLKTOEN (I2C_BUSTCTL[1]) and BUSTOEN (I2C_BUSTCTL[0]) for bus
time-out or clock low time-out control flow.
Sep 9, 2019
ISD94100 Series Technical Reference Manual
ACK
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C Wake-Up Related Signals Waveform
(I2C_BUSTCTL[4]), CLKTOIEN
Page 647 of 928
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C will run in 10-bit mode.
(I2C_BUSTCTL[3]), BUSTOIEN
Rev1.09