Figure 6.12-7 Uart Data Wake-Up; Figure 6.12-8 Uart Rx Fifo Reached Threshold Wake-Up - Nuvoton ISD94124BYI Technical Reference Manual

Isd arm cortex-m4f soc

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UART0_RXD pin

Note1: Stable count means HCLK source recovery stable count.

Note2: UART0_CLK stable count means UART clock source recovery stable count.

RX FIFO reaching threshold wake-up:

To setup the RX FIFO Reached Threshold Wake-up function, configure the following bits:

WKRFRTEN (UART_WKCTL[2]): RX FIFO Reached Threshold Wake-up Enable bit

RFITL (UART_FIFO[7:4]): RX FIFO Interrupt Trigger level

In power down mode, an event that the number of received data in RX FIFO reaches the threshold

value RFITL (UART_FIFO[7:4]) can wakeup the system, and flag RFRTWKF (UART_WKSTS[2])

will be set.

Note: The UART controller clock source should be choose LXT in power down mode for data

UART0_RXD pin

Note: Stable count means HCLK source recovery stable count.

RS-485 Address Matching (AAD mode) wake-up:

Enable the following bits to setup RS-485 address matching wake-up function:

WKRS485EN (UART_WKCTL[3]): RS-485 Address Match Wake-up Enable bit

ADDRDEN (UART_ALTCTL[15]): Rs-485 Address Detection Enable bit

(UART_ALTCTL[31:24]), flag RS485WKF (UART_WKSTS[3]) will be raised and thus wakes up

Note: The UART controller clock source should be selected as LXT in Power-down mode to

receive data.

ISD94100 Series Technical Reference Manual

Power-down mode

UART_CLK stable count

Figure 6.12-7 UART Data Wake-up

Power-down mode

RX FIFO number reached RFITL

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stable count

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