Figure 6.14-18 Bit Sequence Of Dual Output Mode; Figure 6.14-19 Bit Sequence Of Dual Input Mode - Nuvoton ISD94124BYI Technical Reference Manual

The Dual I/O mode is not supported when the Slave 3-Wire mode or the Byte Reorder function is
enabled.
For Dual I/O mode, if both the DUALIOEN (SPI0_CTL[21]) and DATDIR (SPI0_CTL[20]) are set as
1, the SPI0_MOSI0 is the even bit data output and the SPI0_MISO0 will be set as the odd bit data
output. If the DUALIOEN (SPI0_CTL[21]) is set as 1 and DATDIR (SPI0_CTL[20]) is set as 0, both
the SPI0_MISO0 and SPI0_MOSI0 will be set as data input ports.
Note: This function is only supported in SPI0.
SPI0_SS0/1 pin
SPI0_CLK pin
SPI0_MOSI0 pin
SPI0_MISO0 pin
DUALIOEN
DATDIR

Figure 6.14-18 Bit Sequence of Dual Output Mode

SPI0_SS0/1 pin
SPI0_CLK pin
SPI0_MOSI0 pin
SPI0_MISO0 pin
DUALIOEN
DATDIR
Sep 9, 2019
ISD94100 Series Technical Reference Manual
7 6 5 4 3 2 1 0
Master output
Slave input
Master input
Slave output
7 6 5 4 3 2 1 0
Master output
Slave input
Master input
Slave output

Figure 6.14-19 Bit Sequence of Dual Input Mode

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6 4 2 0 6 4 2 0 6 4 2 0 6 4 2 0
Output
7 5 3 1 7 5 3 1 7 5 3 1 7 5 3 1
Output
6 4 2 0 6 4 2 0 6 4 2 0 6 4 2 0
Input
7 5 3 1 7 5 3 1 7 5 3 1 7 5 3 1
Input
Rev1.09