Register Description - Nuvoton ISD94124BYI Technical Reference Manual

Isd arm cortex-m4f soc

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6.12.7 Register Description

UART Receive/Transmit Buffer Register

UART0_BA+0x00

ISD94100 Series Technical Reference Manual

R/W Description

R/W UART Receive/Transmit Buffer Register

Reserved. Any values read should be ignored. When writing to this field always write with

reset value.

Parity Bit Receive/Transmit Buffer

Write Operation:

By writing to this bit, the parity bit will be stored in transmitter FIFO. If PBE (UART_LINE[3])

and PSS (UART_LINE[7]) are set, the UART controller will send out this bit follow the DAT

(UART_DAT[7:0]) through the UART0_TXD pin.

Read Operation:

If PBE (UART_LINE[3]) and PSS (UART_LINE[7]) are enabled, the parity bit can be read by

Note: This bit has effect only when PBE (UART_LINE[3]) and PSS (UART_LINE[7]) are set.

Data Receive/Transmit Buffer

Write Operation:

By writing one byte to this register, the data byte will be stored in transmitter FIFO. The

UART controller will send out the data stored in transmitter FIFO top location through the

UART0_TXD pin.

Read Operation:

By reading this register, the UART controller will return an 8-bit data received from receiver

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