Block Diagram; Isd94100 Series Block Diagram; Figure 5.1-1 Isd94100 Series Block Diagram - Nuvoton ISD94124BYI Technical Reference Manual

5

BLOCK DIAGRAM

5.1

ISD94100 Series Block Diagram

ARM
TM
Cortex -M4
(DSP/FPU/ETM)
200MHz
Data Flash share
Clock control
HS Osc.
48.0/49.152MHz
LS Osc. 10KHz
PDMA
PLL 100~500MHz
16-ch
HS Ext. Crystal
4~24.576MHz
LS Ext. Crystal
32.768KHz
Sep 9, 2019
ISD94100 Series Technical Reference Manual
Power control
Memory
APROM
POR / LVR / BOD
512KB
SRAM 192KB
CPU core LDO
1.2V
LDROM 4KB
with APROM
AHB Bus
Security
CRC External interrupt
General Purpose

Figure 5.1-1 ISD94100 Series Block Diagram

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Timer / PWM
Timer x4
WDT x1/WWDT x1
PWM x6
RTC
Bridge
APB Bus
Connectivity
GPIO
UART0 x1
I2C x2
IO
(SPI/I2S) x2
SPI (Quad) x1
Analog Interface
12-bit ADC 13-ch
USB 1.1 Device
I2S
DMIC
DPWM
Rev1.09