Power Modes; Figure 6.2-4 Isd94100 Series Power Distribution Diagram - Nuvoton ISD94124BYI Technical Reference Manual


Digital power from V
provides a regulated 1.2 V power for digital operation.

USB transceiver power from USB_V
transceiver.
Analog power (AV ) should be at the same voltage level as digital power (V
DD
Both power supplies should have decoupling capacitors placed as close as possible to pins
preferably with no via.
The outputs of internal voltage regulator, LDO_CAP, requires an external capacitor which should
be located close to LDO_CAP pin and returned directly to V
distribution of the ISD94100 series.
Digital
Logic
LDO_CAP
1.2V
1uF
4~24.576
PB.5
MHz crystal
PB.6
oscillator
32.768 kHz
PC.0
crystal
PC.1
oscillator

Figure 6.2-4 ISD94100 Series Power Distribution Diagram

6.2.4

Power Modes

The ISD94100 series power mode include Normal mode, Idle mode and Power-down mode. The
system starts up in Normal mode. In Idle mode, only CPU clock is disabled while other peripherals
work normally. If system is waiting for an interrupt only, the user can set system in Idle mode to
save power and wake-up quickly. The user can set system into Power-down mode when system
does not need to work for a long time. ISD94100 series provides several power-down modes with
different power consumption level.
The ISD94100 series includes the following power modes:
Sep 9, 2019
ISD94100 Series Technical Reference Manual
and V : supplies the power to the internal regulator which
DD SS
DD33
SRAM Flash
PLL POR12
Power On
POR33
Control
Low Voltage Reset 48.0/49.152
MHz HIRC
Brown-out Detector Oscillator
I94100 Series Power Distribution
Page 54 of 928
offers the power for operating the USB
).
DD
. The Figure 6.2-4 shows the power
SS
USB 1.1
PHY
IO Cell
12-bit ADC
V to 1.2V
DD
IO Cell
LDO
10 KHz
LIRC
Oscillator
PB.13~PB.15
AV
DD
AV
SS
GPIOs except
PB.13~PB.15
Rev1.09