Pwm Generator And Capture Timer (Pwm); Overview; Features - Nuvoton ISD94124BYI Technical Reference Manual

6.8 PWM Generator and Capture Timer (PWM)

6.8.1

Overview

The ISD94100 series provides one PWM generators － PWM0. It supports 6 channels of PWM
output or input capture. There is a 12-bit prescaler to support flexible clock to the 16-bit PWM
counter with 16-bit comparator. The PWM counter supports up, down and up-down counter types.
PWM using comparator compared with counter to generate events. These events use to generate
PWM pulse, interrupt and trigger signal for EADC to start conversion.
The PWM generator supports two standard PWM output modes: Independent mode and
Complementary mode, they have difference architecture. There are two output functions based on
standard output modes: Group function and Synchronous function. Group function can be enabled
under Independent mode or complementary mode. Synchronous function only enabled under
complementary mode. Complementary mode has two comparators to generate various PWM pulse
with 12-bit dead-time generator and another free trigger comparator to generate trigger signal for
EADC. For PWM output control unit, it supports polarity output, independent pin mask and brake
functions.
The PWM generator also supports input capture function. It supports latch PWM counter value to
corresponding register when input channel has a rising transition, falling transition or both transition
is happened. Capture function also support PDMA to transfer captured data to memory.
6.8.2

Features

6.8.2.1 PWM function features

Clock source supports maximum clock frequency up to 200 MHz

Supports up to 6 output channels.

Supports independent mode for PWM output/Capture input channel

Supports complementary mode for 3 complementary paired PWM output channel

Dead-time insertion with 12-bit resolution

Synchronous function for phase control

Two compared values during one period

Supports 12-bit pre-scalar from 1 to 4096

Supports 16-bit resolution PWM counter

Up, down and up/down counter operation type

Supports one-shot or auto-reload counter operation mode

Supports group function

Supports synchronous function

Supports mask function and tri-state enable for each PWM pin

Supports brake function

Brake source from pin, system safety events (clock failed, SRAM parity error,
Brown-out detection and CPU lockup).

Noise filter for brake source from pin

Edge detect brake source to control brake state until brake interrupt cleared
Sep 9, 2019
ISD94100 Series Technical Reference Manual
Page 402 of 928 Rev1.09