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ISD2360
User Manuals: Nuvoton ISD2360 ChipCorder
Manuals and User Guides for Nuvoton ISD2360 ChipCorder. We have
1
Nuvoton ISD2360 ChipCorder manual available for free PDF download: Design Manual
Nuvoton ISD2360 Design Manual (72 pages)
ISD ChipCorder
Brand:
Nuvoton
| Category:
Motherboard
| Size: 3 MB
Table of Contents
Table of Contents
3
1 General Description
8
Overview
8
Features
8
2 Pin Configurations
10
Pin Diagrams
10
Figure 2-1 ISD2360 QFN 32-Lead Package
10
Pin Descriptions
11
Figure 2-2 ISD2360 SOP 16-Lead 300 Mil Package
11
Table 2-1 32-Lead QFN Pin Descriptions
11
Table 2-2 SOP 16-Lead Pin Descriptions
13
3 Block Diagram
14
Figure 3-1 ISD2360 Block Diagram
14
4 Device Status
15
Device Status Register
15
Table 4-1 Device Status Register Description
15
Device Interrupt Register
16
Table 4-2 Interrupt Status Register Description
16
5 Device Configuration
17
Device ID
17
Clock Configuration
17
Gpio Configuration
17
GPIO Pin Function Definition
17
Table 5-1 AF1/AF0 Bit Combinations for GPIO Pin Function Mode
17
Special 3 V Registers
18
GPIO Pin Structure
18
Figure 5-1 GPIO Pad Structure
18
Table 5-2 GPIO Pin Function Modes
18
Signal Path Configuration
19
Figure 5-2 ISD2360 Signal Path
19
Device Checksum
20
Table 5-3 Checksum Register Result Data Storage
20
Table 5-4 C Code Example Fletcher-32 Checksum Calculation
20
Indirect Reference Registers
21
GPIO4 Configuration for Digital Read/Write
21
Table 5-5 Indirect Reference Registers R0-R7
21
Table 5-6 GPIO Pin and Indirect Reference Register Association
21
Fast De-Bounce for GPIO Trigger
22
Thermal Shutdown
22
Figure 5-3 PWM Output Thermal Shutdown
22
6 Operational Description
23
Overview
23
Audio Storage
23
Sample Rates
23
Audio Compression and De-Compression
24
System Voice Macro Flow Chart
24
Table 6-1 Available Sample Rates
24
Gpio Trigger
25
GPIO Trigger Basics
25
Figure 6-1 System Reserved Voice Macro Flow Chart
25
SPI or GPIO Trigger
26
Pulling SSB Low Automatically Claims the SPI Interface
26
Figure 6-2 por Reset Failure from Power Supply Glitches
27
GPIO Trigger Execution Is Preemptive
27
Pulling SSB Low Does Not Affect the Triggering Capability
27
SPI Vs. GPIO Triggering Reliability
27
Volume Control Via GPIO Trigger
28
Multi-Channel Feature
28
SPI Multi Channel
28
Multi Channel GPIO Trigger
28
VM Jump and Channel Counter Commands
29
VM Branch Commands
29
Channel Counter Command
29
7 Memory Management
30
Figure 7-1 ISD2360 Memory Organization
30
Memory Header
31
Memory Format
31
Table 7-1 Memory Data Sequence Without Reserved User Data
31
Memory Protection
32
Table 7-2 Memory Header MP_CFG Byte
32
Table 7-3 Memory Protection Scheme
32
Voice Prompt
33
Voice Macro
33
Voice Macro Commands
33
Table 7-4 Voice Macro Commands
34
Sample Project Voice Macros
35
Sample_1: a Simple Trigger-To-Play Project
35
System-Reserved Voice Macros
35
Figure 7-2 Sample_Project_1 Configuration
36
Sample_2: Channel Mixing with Volume Control
37
Figure 7-3 Sample_Project_2 Configuration
38
Sample_3: Driving GPIO Using the Channel Counter
39
Figure 7-4 Sample_Project_3 Configuration
40
User Data
41
8 Serial Peripheral Interface
42
Spi Features
42
Figure 8-1 SPI Data Transaction Waveform
42
Figure 8-2 RDY/BSYB Timing for SPI Write Transactions
43
Figure 8-3 RDY/BSYB Ignored for SPI Transactions
43
Spi Commands
44
Table 8-1 SPI Commands
44
Spi Command Vs Tatus
45
Table 8-2 SPI Commands Vs. Status
45
Spi Command Descriptions
46
Audio Play Commands
46
PLAY_VP - Play Voice Prompt
46
Play_Vp@Rn - Play Voice Prompt @ Rn
47
Play_Vp@Rn_Lp - Loop Play Voice Prompt Referenced by Rncnt Times
47
PLAY_VP_LP - Play Voice Prompt Loop
47
EXE_VM -Execute Voice Macro
48
Exe_Vm@Rn - Execute Voice Macro Referenced by Rn
48
PLAY_SIL - Play Silence
48
SPI_PCM_READ - SPI Read De-Compressed PCM Data from Memory
49
STOP - Stop the Play Operations
49
STOP_LP - Stop Loop Play Operations
49
Figure 8-4 SPI Read De-Compressed Data (Playback)
50
SPI_SND_DEC - SPI Send Compressed Data for Decoding
50
Device Status Commands
51
Figure 8-5 SPI Send Compressed Data to Decode
51
READ_INT - Read Interrupt
51
READ_STATUS - Read Status
51
READ_ID - Read Device ID
52
Digital Commands
52
DIG_READ - Digital Read
52
DIG_WRITE - Digital Write
53
ERASE_MEM - Sector Erase Memory
53
CHECKSUM - Calculate Hardware Checksum
54
CHIP_ERASE - Erase Entire Memory
54
Device Configuration Commands
55
PWR_DN - Power down Device
55
PWR_UP - Power up Device
55
SET_CLK_CFG - Set Clock Configuration Register
55
RD_CFG_REG - Read Configuration Register
56
RD_CLK_CFG - Read Clock Configuration Register
56
RESET - Reset Device
56
WR_CFG_REG - Write Configuration Register
56
9 Register Operations
57
Table 9-1 Register Operations
57
10 Application Diagrams
64
Spi Application under Mcu Control
64
Figure 10-1 SPI Application under MCU Control
64
Gpio Trigger Standalone Application
65
Figure 10-2 GPIO Trigger Standalone Application
65
11 Electrical Characteristics
66
Operating Conditions
66
Ac Paramaters
66
Internal Oscillator
66
Speaker Outputs
66
Table 11-1 Operating Conditions (Industrial Packaging)
66
DC Parameters
67
SPI Timing
67
Figure 11-1 SPI Timing
67
Table 11-2 SPI Timing
68
12 Package Dimensions
69
Figure 12-1 QFN 32-Lead Package
69
Figure 12-2 SOP 16-Lead Package
70
13 Ordering Information
71
14 Revision History
72
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