Block Diagram; Figure 6.7-1 Timer Controller Block Diagram - Nuvoton ISD94124BYI Technical Reference Manual

6.7.3

Block Diagram

Timer Controller block diagram is shown below.
TMRx_CLK
TM0 ~ TM3
CAPEN
(TIMERx_EXTCTL[3])
TM0_EXT ~ TM3_EXT
Timer clock source can be from:
-
HXT
-
LXT
-
PCLK1
-
External clock on TMx pin, x=0, 1, 2 or 3.
-
LIRC
-
HIRC
Note: in PWM mode clock source selection is different, as explanation follows.
.
Sep 9, 2019
ISD94100 Series Technical Reference Manual
RSTCNT(TIMERx_CTL[26]
Reset counter
CNTEN(TIMERx_CTL[30]
0
8 - bit
Prescale
1
0
1 EXTCNTEN
(TIMERx_CTL[24])
CNTPHASE
CAPFUNCS
(TIMERx_EXTCTL[0])
(TIMERx_EXTCTL[4])
CAPIF
(TIMERx_
00
EINTSTS[0])
0
01
10
1
CAPEDGE
(TIMERx_EXTCTL[2:1])

Figure 6.7-1 Timer Controller Block Diagram

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WKEN
24 - bit CMPDAT
(TIMERx_CTL[23])
(TIMERx_CMP[23:0])
+ TIF
=
(TIMERx_INTSTS[0])
-
24 - bit up counter
Reset counter
24– bit CNT
(TIMERx_CNT[23:0])
Load
24– bit CAPDAT
(TIMERx_CAP[23:0]) INTEN
(TIMERx_CTL[29])
CAPIEN
(TIMERx_EXTCTL[5])
Timer
TWKF Wakeup
(TIMERx_INTSTS[1])
Timer
Interrupt
Rev1.09