Figure 6.21-3 Splitter Frequency Response And Channel Distribution - Nuvoton ISD94124BYI Technical Reference Manual

Isd arm cortex-m4f soc
Table of Contents

Advertisement

separation for left and right channels. Left and right channels keep high frequency signals and the
low frequency signals go to sub-woofer.

Figure 6.21-3 Splitter Frequency Response and Channel Distribution

6.21.5.5 Biquad Filter Configuring
A coefficient programmable 10 bands biquad filter (20
DPWM_CLK is 500fs and Fs is 48 kHz, bquad filter supports 9 bands.
To configure the biquad filter:
Reset audio DPWM modulator by setting register DPWMRST (SYS_IPRST2[6]).
Enable
coefficient
(DPWM_COEFFCTL[0]) to "1".
Set biquad filter coefficient in register COEFFDAT (DPWM_COEFFn, if BIQBANDNUM = 6, n
= 0 ~ (6 x 5 – 1)).
Disable
coefficient
(DPWM_COEFFCTL[0]) to "0".
Set biquad filter band number in register BIQBANDNUM (DPWM_CTL[27:24]).
Enable biquad filter by setting register BIQON (DPWM_CTL[21]) to "1".
6.21.5.6 Biquad filter and splitter Configuring
The splitter shares 4 bands biquad filter. The maximum number of biquad filter bands become 6, if
biquad filter and splitter both are on. The bands of biquad filter are ahead then set splitter band
when configure coefficient register. For example, if the total number of bands is 6, the biquad filter
coefficients need to set in registers DPWM_COEFF0 to DPWM_COEFF9, and splitter coefficients
need to set in registers DPWM_COEFF10 to DPWM_COEFF29.
Sep 9, 2019
ISD94100 Series Technical Reference Manual
RAM
programming
mode
RAM
programming
mode
Page 902 of 928
th
-Order IIR filter) is available. Note that if
by
setting
register
by
setting
register
PRGCOEFF
PRGCOEFF
Rev1.09

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents