Register Description - Nuvoton ISD94124BYI Technical Reference Manual

Isd arm cortex-m4f soc
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6.10.7 Register Description

WWDT Reload Counter Register
(WWDT_RLDCNT)
Offset
Register
WWDT_RLDCNT
WWDT_BA+0x00
31
30
23
22
15
14
7
6
Description
Bits
[31:0]
RLDCNT
Sep 9, 2019
ISD94100 Series Technical Reference Manual
R/W Description
W
WWDT Reload Counter Register
29
28
27
RLDCNT
21
20
19
RLDCNT
13
12
11
RLDCNT
5
4
3
RLDCNT
WWDT Reload Counter Register
Writing 0x00005AA5 to this register will reload the WWDT counter value to 0x3F.
Note: User can only write WWDT_RLDCNT register to reload WWDT counter value
when current WWDT counter value between 0 and CMPDAT (WWDT_CTL[21:16]). If
user writes WWDT_RLDCNT when current WWDT counter value is larger than
CMPDAT , WWDT reset signal will generate immediately.
Page 539 of 928
Reset Value
0x0000_0000
26
25
24
18
17
16
10
9
8
2
1
0
Rev1.09

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