Usb 1.1 Device Controller (Usbd); Overview; Features - Nuvoton ISD94124BYI Technical Reference Manual

6.18 USB 1.1 Device Controller (USBD)

6.18.1 Overview

There is one set of USB 2.0 full-speed device controller and transceiver in this device. It is compliant
with USB 2.0 full-speed device specification and supports control/bulk/interrupt/isochronous
transfer types.
In this device controller, there are two main interfaces: the APB bus and USB bus which comes
from the USB PHY transceiver. For the APB bus, the CPU can program control registers through
it. There are 1Kbytes internal SRAM as data buffer in this controller. For IN or OUT transfer, it is
necessary to write data to SRAM or read data from SRAM through the APB interface or SIE. User
needs to set the effective starting address of SRAM for each endpoint buffer through buffer
segmentation register (USBD_BUFSEGx).
There are 12 endpoints in this controller. Each of the endpoint can be configured as IN or OUT
endpoint. All the operations including Control, Bulk, Interrupt and Isochronous transfer are
implemented in this block. The block of "Endpoint Control" is also used to manage the data
sequential synchronization, endpoint states, current start address, transaction status, and data
buffer status for each endpoint.
There are four different interrupt events in this controller. They are the no-event-wake-up, device
plug-in or plug-out event, USB events, like IN ACK, OUT ACK etc, and BUS events, like suspend
and resume, etc. Any event will cause an interrupt, and users just need to check the related event
flags in interrupt event status register (USBD_INTSTS) to acknowledge what kind of interrupt
occurring, and then check the related USB Endpoint Status Register (USBD_EPSTS0 and
USBD_EPSTS1) to acknowledge what kind of event occurring in this endpoint.
A software-disconnect function is also supported for this USB controller. It is used to simulate the
disconnection of this device from the host. If user enables SE0 bit (USBD_SE0), the USB controller
will force the output of USB_D+ and USB_D- to level low and its function is disabled. After disable
the SE0 bit, host will enumerate the USB device again.
For more information on the Universal Serial Bus, please refer to Universal Serial Bus Specification
Revision 1.1.

6.18.2 Features


Compliant with USB 2.0 Full-Speed specification

Provides 1 interrupt vector with 4 different interrupt events (NEVWK, VBUSDET, USB
and BUS)

Supports Control/Bulk/Interrupt/Isochronous transfer type

Supports suspend function when no bus activity existing for 3 ms

Supports 12 endpoints for configurable Control/Bulk/Interrupt/Isochronous transfer
types and maximum 1Kbytes buffer size

Provides remote wake-up capability
Sep 9, 2019
ISD94100 Series Technical Reference Manual
Page 833 of 928 Rev1.09