Table 6.12.5-7 Uart Line Control Of Word And Stop Length Setting; Table 6.12.5-8 Uart Line Control Of Parity Bit Setting - Nuvoton ISD94124BYI Technical Reference Manual

auto-flow control that provides programmable nRTS flow control trigger level. The number of data
bytes in RX FIFO is equal to or greater than RTSTRGLV (UART_FIFO[19:16]), the nRTS is de-
asserted.
UART Line Control Function
The UART controller supports fully programmable serial-interface characteristics via UART_LINE
register. Table 6.12.5-7 and Table 6.12.5-8 provide a quick reference for UART port format setting.
NSB
(UART_LINE[2])
0
0
0
0
1
1
1
1

Table 6.12.5-7 UART Line Control of Word and Stop Length Setting

SPE
Parity Type
(UART_LINE[5])
No Parity
x
Parity source
x
from UART_DAT
Odd Parity 0
Even Parity 0
Forced Mask
1
Parity
Forced Space
1
Parity

Table 6.12.5-8 UART Line Control of Parity Bit Setting

Sep 9, 2019
ISD94100 Series Technical Reference Manual
WLS
(UART_LINE[1:0])
00
01
10
11
00
01
10
11
EPE PSS
(UART_LINE[4]) (UART_LINE[7])
x x
x 1
0 0
1 0
0 0
1 0
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Word Length (Bit) Stop Length (Bit)
5
6
7
8
5
6
7
8
PBE
Description
(UART_LINE[3])
0 No parity bit output.
Parity bit is generated and checked
1
by software.
Odd Parity is calculated by adding all
the "1's" in a data stream and adding
1
a parity bit to the total bits, to make
the total count an odd number.
Even Parity is calculated by adding
all the "1's" in a data stream and
1
adding a parity bit to the total bits, to
make the count an even number.
Parity bit always logic 1.
Parity bit on the serial byte is set to
1
"1" regardless of total number of "1's"
(even or odd counts).
Parity bit always logic 0.
Parity bit on the serial byte is set to
1
"0" regardless of total number of "1's"
(even or odd counts).
1
1
1
1
1.5
2
2
2
Rev1.09