Figure 6.10-5 WWDT Reload Counter When WWDT_CNT < WINCMP
T
WWDT
WWDT_CLK
15
WWDTVAL
WWDTIF
(WWDT_STATUS[0])
WWDTRF
(WWDT_STATUS[1])
6.10.5.4 WWDT Window Setting Limitation
When user writes 0x00005AA5 to WWDT_RLDCNT register to reload WWDT counter value to
0x3F, it needs 3 WWDT clocks to sync the reload command to actually perform reload action. Notice
that if user set PSCSEL (WWDT_CTL[11:8]) to 0000, the counter prescale value should be as 1,
and the CMPDAT (WWDT_CTL[21:16]) must be larger than 2. Otherwise, writing WWDT_RLDCNT
register to reload WWDT counter value to 0x3F is unavailable, WWDTIF (WWDT_STATUS[0]) is
generated, and WWDT reset system event always happened. The WWDT CMPDAT setting
limitation is shown in Table 6.10.5-2.
PSCSEL
0000
0001
Others
6.10.5.5 WWDT ICE Debug
When ICE is connected to MCU, WWDT counter is counting or not by ICEDEBUG
(WWDT_CTL[31]). The default value of ICEDEBUG is 0, WWDT counter will stop counting when
CPU is held by ICE. If ICEDEBUG is set to 1, WWDT counter will keep counting no matter CPU is
held by ICE or not.
Sep 9, 2019
ISD94100 Series Technical Reference Manual
WWDTIF = 1
(if CMPDAT = 0x10)
14 13
12 11 10 0F 0E
Note : PSCSEL (WWDT_CTL[11:8]) = 0x0, CMPDAT (WWDT_CTL[21:16]) = 0x10
Figure 6.10-6 WWDT Interrupt and Reset Signals
Prescale Value
1
2
Others
Table 6.10.5-2 CMPDAT Setting Limitation
Page 537 of 928
WWDTRF = 1
02 01 00
Valid CMPDAT Value
0x3 ~ 0x3F
0x2 ~ 0x3F
0x0 ~ 0x3F
Rev1.09