Setting: BRKAEVEN = 3 (High)
BRKAODD = 2 (Low)
CNT
Edge Detect
Brake Source
BRKEIF0
BRKEIF1
BRKESTS0
BRKESTS1
PWM_CH0
PWM_CH1
PWM_CH0 signals resume at next start
of PWM period after BRKEIF0 clear
Figure 6.8-32 Edge Detector Waveform for PWM0_CH0 and PWM0_CH1 Pair
Setting: BRKAEVEN = 3 (High)
BRKAODD = 2 (Low)
CNT
Level Detect
Brake Source
BRKLIF0
BRKLIF1
BRKLSTS0
BRKLSTS1
PWM_CH0
PWM_CH1
Figure 6.8-33 Level Detector Waveform for PWM0_CH0 and PWM0_CH1 Pair
The two kinds of detectors detect the same five brake sources: two from external input signals, one
from ADC result monitor (EADCRM), one from system fail and one from software triggered, that are
Sep 9, 2019
ISD94100 Series Technical Reference Manual
s/w clear
s/w clear
No matter BRKLIF0 or BRKLIF1 clear or not, while no brake
event occur, brake state resume at next start of PWM period
Page 430 of 928
s/w clear
PWM_CH1 signals resume at next start
of PWM period after BRKEIF1 clear
Note:
Output Brake State
s/w clear
Note:
Output Brake State
Rev1.09