Figure 6.4-5 Boot From Aprom With Iap Support - Nuvoton ISD94124BYI Technical Reference Manual

Isd arm cortex-m4f soc

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Boot from APROM with IAP support

By writing 0b10 into CBS[1:0] bits in CONFIG0, the ISD94100 device will load the system vector

table from APROM space 0x0000_0000 - 0x0000_01FF. In this mode, except that the MCU boots

from APROM, all other functions as the same as "boot from LDROM with IAP support" mode.

It has the access to all memory space, can read, erase write any other part of the APROM and

LDROM. It supports IAP and remapping. Remapping can be done by first writing the target remap-

to address to FMC_ISPADDR register and then triggering ISP procedure with the "Vector Remap"

command (0x2E). The targeted remapping address needs to be in alignment with 512bytes.

Boot from LDROM without IAP support

By writing 0b01 into CBS[1:0] bits in CONFIG0, the ISD94100 device will load the system vector

table from LDROM space 0x0010_0000 - 0x0010_01FF. In this mode the MCU boots from LDROM,

and only has the access to LDROM, as shown in Figure 6.4-6.

ISD94100 Series Technical Reference Manual

ApplicationROM

System Vector Table

Figure 6.4-5 Boot from APROM with IAP support

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