Table 6.14.2-1 Spi Feature Difference (Spi0~Spi2) - Nuvoton ISD94124BYI Technical Reference Manual

Isd arm cortex-m4f soc
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Dual/Quad I/O Mode
Two-Bit Transfer Mode
FIFO Depth
Slave Time-out Function
Slave 3-Wired Mode
2
I
S Mode

Table 6.14.2-1 SPI feature difference (SPI0~SPI2)

Sep 9, 2019
ISD94100 Series Technical Reference Manual
SPI0
V
V
SPI mode 8~16 bits data length: 8-level
8-level
V
V
X
Page 675 of 928
SPI1 / SPI2
X
X
Otherwise: 4-level
X
X
V
Rev1.09

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