Figure 6.4-14 Fast Flash Programming Verification Flow - Nuvoton ISD94124BYI Technical Reference Manual

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6.4.4.6
Fast Flash Programming Verification
The ISD94100 series supports fast flash programming with hardware self-verification feature, in
which during programming the hardware does verification at the same time, so that it saves time
for memory data read back and comparison. That is, when data is programmed to the embedded
flash memory, the controller asserts the flash read operation to read data out, and performs data
comparison. If there is discrepancy found, PGFF (FMC_ISPSTS[5]) flag will be set. The PGFF bit
will be kept until cleared by software or a new erase operation. The ISD94100 series flash
programing with self-verification feature is shown in Figure 6.4-14 below.
Traditional Flash
Programming Start
Erase Flash
Programming Flash
Readback Verification

Figure 6.4-14 Fast Flash Programming Verification Flow

Compared to traditional programming operation, in which the software has to perform three-step
operations to complete the programming: (1) erase flash, (2) program flash, and (3) flash data read
back and compare; for ISD94100 Series software only needs to read FMC_ISPSTS to check PGFF
flag in step (3) and does not have to read massive data back and compare.
Sep 9, 2019
ISD94100 Series Technical Reference Manual
END
Page 208 of 928
Fast Flash
Programming with self
Verification Start
Erase Flash
Programming
Flash Memory
Read Control
Embedded Flash
Memory
DIN/DOUT
Verification
Program Fail Flag
(PGFF)
END
Rev1.09

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