Pdma Controller (Pdma); Overview; Features; Block Diagram - Nuvoton ISD94124BYI Technical Reference Manual

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6.6 PDMA Controller (PDMA)

The peripheral direct memory access (PDMA) controller is used to provide high-speed data transfer.

The PDMA controller can transfer data from one address to another without CPU intervention. This

has the benefit of reducing the workload of CPU and keeps CPU resources free for other

applications. The PDMA controller has a total of 16 channels and each channel can perform transfer

between memory and peripherals or between memory and memory.

Supports 16 independently configurable channels

Supports selectable 2 level of priority (fixed priority or round-robin priority)

Supports transfer data width of 8, 16, and 32 bits

Supports source and destination address increment size can be byte, half-word, word

or no increment

Supports software and SPI, UART, ADC and PWM request

Supports Scatter-Gather mode to perform sophisticated transfer through the use of

the descriptor link list table

Supports single and burst transfer type

Supports time-out function on channel 0 and channel1

Supports stride function from channel 0 to channel 5

The block diagram about PDMA controller is shown as follows.

ISD94100 Series Technical Reference Manual

Master / Slave Wrapper

PDMA Controller

Page 264 of 928

Descriptor Table

I/O, Decoder

Embedded SRAM

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