Table 6.11.5-1 Rtc Read/Write Enable - Nuvoton ISD94124BYI Technical Reference Manual

6.11.5.2 RTC Read/Write Enable
If RWENF(RTC_RWEN[16]) bit is read as 1, it means the RTC registers are read/write accessible.
When executing write RTC register command exceed 6 times within 1120 PCLK cycles, the
RTCBUSY(RTC_RWEN[24]) flag will be set 1 and RWENF(RTC_RWEN[16]) will be clear to 0. The
RTC control registers access attribute when RWENF is 1 and 0 are shown in Table 6.11.5-1.
Register
RTC_INIT
RTC_RWEN
RTC_FREQADJ
RTC_TIME
RTC_CAL
RTC_CLKFMT
RTC_WEEKDAY
RTC_TALM
RTC_CALM
RTC_LEAPYEAR
RTC_INTEN
RTC_INTSTS
RTC_TICK
RTC_TAMSK
RTC_CAMSK
RTC_LXTCTL
6.11.5.3 Frequency Compensation
The RTC_FREQADJ register allows user to make digital compensation to a clock input. Please
follow the example and formula below to write the actual frequency of 32k crystal to RTC_FREQADJ
register. Following are the compensation examples for higher or lower than 32768 Hz.
Example 1:
Frequency counter measurement : 32773.65 Hz (> 32768 Hz)
FREQADJ = (32768 * 0x200000) / 32773.65 = 0x1FFE96
Example 2:
Frequency counter measurement : 32763.25 Hz (< 32768 Hz)
FREQADJ = (32768 * 0x200000) / 32763.25 = 0x200130
Note: The value of RTC_FREQADJ register will be the default value (0x0020_0000) while the
compensation is not executed. User can utilize a frequency counter to measure RTC clock source
via clock output function in manufacturing. In the meanwhile, user can use clock output function to
check the result of RTC frequency compensation.
Sep 9, 2019
ISD94100 Series Technical Reference Manual
INIT[0] = 0 RWENF = 1
available R/W
available R/W
available
R/W
Not available R/W
Not available R/W
Not available R/W
Not available R/W
Not available R/W
Not available R/W
Not available R
available R/W
available R/W
Not available R/W
Not available R/W
Not available R/W
available R/W

Table 6.11.5-1 RTC Read/Write Enable

Page 546 of 928
RWENF = 0 Or RTCBUSY=1
R/W
R/W
R
R
R
R
R
R
R
R
R/W
R/W
R
R
R
R/W
Rev1.09