Figure 6.8-30 Brake Noise Filter Block Diagram - Nuvoton ISD94124BYI Technical Reference Manual

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many sampling clock cycles a filter will recognize the effective edge of the brake signal.
In addition, it can be inversed by setting the BRKxPINV (x denotes input external pin 0 or 1) bits of
PWM_BNF register to realize the polarity setup for the brake control signals. Set BRKxPINV bit to
0, brake event will occurred when PWM0_BRAKEy(y=0,1) pin status is from low to high; set
BRKxPINV to 1, brake event will occurred when PWM0_BRAKEy pin status is from high to low.
HCLK/128
PWM0_BRAKEy
For Complementary mode, it is often necessary to set a safe output state to the complement output
pairs once the brake event occurs.
Each complementary channel pair shares a PWM brake function, as shown Figure 6.8-31. To
control
paired
channels
(PWM_BRKCTL0_1[17:16]) for even channels and BRKAODD (PWM_BRKCTL0_1[19:18]) for odd
channels when the fault brake event happens. There are two brake detectors: Edge detector and
Level detector. When the edge detector detects the brake signal and BRKEIENn_m
(PWM_INTEN1[2:0]) is enabled, the brake function generates BRK_INT. This interrupt needs
software to clear, and the BRKESTSn (PWM_INTSTS1[21:16]) brake state will keep until the next
PWM period starts after the interrupt cleared. The brake function can also operate in another way
through the level detector. Once the level detector detects the brake signal and the BRKLIENn_m
(PWM_INTEN1[10:8]) is also enabled, the brake function will generate BRK_INT, but BRKLSTSn
(PWM_INTSTS1[29:24]) brake state will auto recovery to normal output while level brake source
recovery to high level and pass through "Low Level Detection" at the PWM waveform period when
brake condition removed without clear interrupt.
Sep 9, 2019
ISD94100 Series Technical Reference Manual
BRKxNFSEL
(PWM_BNF[3:1] for BKP0)
(PWM_BNF[11:9] for BKP1)
0
HCLK
(PWM_BNF[6:4] for BKP0)
HCLK/2
1
(PWM_BNF[14:12] for BKP1)
HCLK/4
2
HCLK/8
3
Sampling Clock
HCLK/16
4
5
HCLK/32
6
HCLK/64
7
BRKxNFEN
(PWM_BNF[0] for BKP0)
(PWM_BNF[8] for BKP1)

Figure 6.8-30 Brake Noise Filter Block Diagram

to
output
safety
Page 428 of 928
BRKxFCNT
(PWM_BNF[7] for BKP0)
(PWM_BNF[15] for BKP1)
3
Noise filter
counter 3-bits
3
Note: x, y denotes 0 or 1
state,
user
can
BRKxPINV
0
Brake Source
1
setup
BRKAEVEN
Rev1.09

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