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4.
ABRDIF (UART_FIFOSTS[1]) is set, the auto-baud rate measurement is finished.
5.
Operate UART transmit and receive action.
6.
ABRDTOIF (UART_FIFOSTS[2]) is set, if auto-baud rate counter is overflow.
7.
Go to Step 3.
6.12.5.4 UART Controller Transmit Delay Time Value
By configuring DLY (UART_TOUT [15:8]), transfer delay time can be added between the last stop
bit and next start bit in transmission, shown in Figure 6.12-4. The unit is baud.
TX
Start
6.12.5.5 UART Controller FIFO Control and Status
The UART controller has built-in a 16 bytes transmitter FIFO (TX_FIFO) and a 16 bytes receiver
FIFO (RX_FIFO) that reduces the number of interrupts presented to the CPU. The CPU can read
the status of the UART FIFO any time during operation. The information presented in
UART_FIFOSTS register includes RX/TX FIFO status, pointer location, error status, etc. UART,
and RS-485 mode all support FIFO control and status functions.
6.12.5.6 UART Controller Wake-up Function
The ISD94100 series UART controller supports wake-up function. The wake-up source be
-
nCTS pin
-
incoming data
-
RX FIFO reaching threshold
-
RS-485 address matching
-
RX FIFO threshold time-out
The UART wake-up source can be identified by checking UART_WKSTS register. If wake-up
interrupt enable bit WKIEN (UART_INTEN[6]) is enable, UART wake-up interrupt will be generated
and WKIF bit(UART_INTSTS[6]) will be set.
nCTS pin wake-up :
When system is in power down mode and WKCTSEN (UART_WKCTL[0]) is set, toggling on
UART0_nCTS pin wakes up the system, and CTSWKF (UART_WKSTS[0]) will be set to 1.
Sep 9, 2019
ISD94100 Series Technical Reference Manual
Byte (i)
DLY
Stop
Figure 6.12-4 Transmit Delay Time Operation
Page 575 of 928
Byte (i+1)
Start
Rev1.09
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