Figure 6.4-11 Timeline Comparison For Write Operations; Figure 6.4-12 Firmware In Sram For Multi-Word Programming - Nuvoton ISD94124BYI Technical Reference Manual

Isd arm cortex-m4f soc
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multi-word write operation needs to write at least 16 bytes (4 words), and can write up to 512 bytes.
No matter how many bytes are to be written in one multi-word write session, there is only one flash
SETUP time before writing and only one HOLD time after writing, as shown in Figure 6.4-11 below.
32-bit
SETUP
Programming
TIME
64-bit
SETUP
Programming
TIME
Multi-Word
SETUP
Programming
TIME
Time

Figure 6.4-11 Timeline comparison for write operations

Within a multi-word programming session, the firmware needs to monitor buffer status, continuously
prepare next batch two bytes of data in time to ensure a successful programming session. Because
fetching code from APROM or LDROM cannot keep up with this pace, multi-word programing
firmware code should run from SRAM.
Flash Memory Controller
Embedded Flash Memory

Figure 6.4-12 Firmware in SRAM for Multi-word Programming

Sep 9, 2019
ISD94100 Series Technical Reference Manual
HOLD
fix 4 bytes programming
TIME
fix 8 bytes programming
16 ~ 512 bytes programming (16 bytes align)
Cortex-M4 CPU
AHB Slave Interface
Flash
Control
Registers
Flash
Operation Control
(APROM)
(LDROM)
(Data Flash)
Page 205 of 928
HOLD
TIME
HOLD
TIME
Embedded SRAM
Rev1.09

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